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杜弘隆
2017/07/10
Email：[email protected]
phone：02-29052427
fax：02-29042638
office/research room：SF726C
education：英國倫敦大學 帝國學院 電機及電子工程博士
expertise：通訊積體電路設計、數位/類比積體電路設計
Laboratory website：VLSI 實驗室
self introduction：
Ph.D. in Electrical and Electronic Engineering, D.I.C. in Analog Integrated Circuit Design
Department of Electrical and Electronic Engineering, Imperial College London, U.K.
經歷
  • Aug. 2009 – July 2012 Director, Program of M.Sc. degree for part-time graduate students, Department of Electrical Engineering Fu Jen Catholic University, Xinzhuang Dist., New Taipei City 24205, Taiwan
  • May 2001 – Jan. 2006 (part time), Technical Consultant, Hardware I Department, ACARD Technology Corp., Sanchung Dist., New Taipei City 24158, Taiwan
  • March 2000 – May 2001, Section Manager , ( Project leader for 2.4GHz Bluetooth Transceiver IC ) , RFIC Design Department, Elan Microelectronics Corp., Hsinchu, 30076, Taiwan
專長:
Giga-hertz wire-lined and wireless transceiver design for communication ICs, power-electronics converter ICs, and bio-medical ICs such as high-voltage IC pulsers for medical imaging applications and non-linear high-frequency low phase noise fractional-order circuit design for THz applications.
授課項目:
Electronics(I), Electronics(II), Electronics(III), ASIC Design, RFIC Design for SOC, Introduction to VLSI, VLSI Digital Signal Processing Architecture Design.

List of Publications:

(A). Journal Paper, Book Chapter, and Book:

  1. S. H.-L. Tu and C. Toumazou, “Effect of the loaded quality factor on power efficiency for CMOS Class E RF tuned power amplifiers,” IEEE Transactions on Circuits and Systems - Part I Fundamental Theory and Applications, pp.628-634, May 1999. (SCI, EI)
  2. S. H.-L. Tu and C. Toumazou, “Low-distortion CMOS complementary Class E RF tuned power amplifiers,” IEEE Transactions on Circuits and Systems - Part I Fundamental Theory and Applications, Vol.47, No.5, pp.774-779, May 2000. (SCI, EI)
  3. S. H.-L. Tu and Y.-H. Lin, “An Oversampling Data Recovery Receiving Technique for Serial Link Communications,” Fu Jen Studies (Science and Engineering), No.37, pp.17-42, Dec. 2003.
  4. S. H.-L. Tu, “Class E RF Tuned Power Amplifiers in CMOS Technologies – Theory and Circuit Design Considerations,” IEEE Communications Magazine, Vol.42, No.9, pp.S6-S11, Sep. 2004. (SCI, EI)
  5. S. H.-L. Tu, “Design and implementation of a differential pulsewidth control loop for GHz VLSI systems,”  IEE Electronics Letters, Vol.41, No.17, pp. 960-961, Aug. 2005. (SCI, EI)
  6. S. Y.-S. Lin and S. H.-L. Tu, “Pulsewidth control loop with tunable duty cycle for high-speed circuit applications,” IEE Proceedings – Circuits, Devices, and Systems, Vol.153, No.2, pp.107-114, Apr. 2006. (SCI, EI)
  7. S. H.-L. Tu, “A Differential Pulsewidth Control Loop for High-Speed VLSI Systems,” IEEE Transactions on Circuits and Systems–II, Vol.53, No.5, pp.417-421, May 2006. (SCI, EI)
  8. S. H.-L. Tu and P. J.-W. Huang, “A Serial Feedback Digital PWM Regulator for DC-DC Buck Conversion,” Fu Jen Studies (Science and Engineering), No.41, pp.57-68, Dec. 2007.
  9. S. H.-L. Tu and S. C.-H. Chen, “A 5.25-GHz CMOS Cascode Power Amplifier for 802.11a WLAN,” IEE Proceedings – Microwaves, Antennas & Propagation. Vol.2, No.6, pp. 627-634, Sep. 2008. (SCI, EI)
  10. S. H.-L. Tu, and C.-T. Lee, “A PWM Controller with Multiple-Access Table Look-up for DC-DC Buck Conversion,” Word Academy of Science, Engineering and Technology, Vol.30, pp. 427-430, June 2009. (ISI)
  11. S. H.-L. Tu, “Analysis and Design of Power-Controllable CMOS Class E RF Tuned Power Amplifiers,”   IEE Proceedings – Power Electronics, Vol.5, No.4, pp. 428-434, April 2012. (SCI, EI)
  12. S. H.-L. Tu and Y.-H. Cheng, “Realization of Fractional-Order Capacitors with Field-Effect Transistors,” Word Academy of Science, Engineering and Technology, Vol.71, pp. 778-781, Nov. 2012. (ISI)
  13. S. H.-L. Tu and W.-H. Su, “Design and Implementation of High-Speed CMOS Analog Front-End Circuits for Image Sensors,” Fu Jen Studies (Science and Engineering), No.46, pp.87-114, May 2013.
  14. S. H.-L. Tu and M. M.-H. Chiu, "A Digital PWM Controller Based on Fully Table Look-Up for SOC Applications," IEE Proceedings - Power Electronics, Vol.6, No.9, pp.1778-1785, Nov. 2013. (SCI, EI)
  15. S.H.-L. Tu and H.-H. Chen, “Low Timing-Jitter and High Precise Delay Generation with Coupled Ring Oscillators,” International Journal of Electronics Letters (on-line), pp. 1-12, Sep. 2014. (SCI, EI)
  16. S. H.-L. Tu and H.-W. Yeh, “A Hybrid PWM Controller IC for DC-DC Buck Conversion with Table Look-Up PID Compensator,” International Journal of Engineering and Innovative Technology, Vol.4, No.3, pp.113-116, Sep. 2014.
  17. S. H.-L. Tu and Vic Yang, “A Primary-Side Controlled Flyback LED Driver with Highly-Efficient Line Regulation,” International Journal of Engineering and Innovative Technology, Vol.6, No.2, pp.11-17, Aug. 2016.
  18. T. Chan, S. Tu and C. Toumazou, “Trade-offs in Power Amplifiers,” Chapter 29 in Trade-Offs in Analog Circuit Design, Edited by C. Toumazou, G. Moschytz, and B. Gilbert. Kluwer Academic Publishers (ISBN 1-4020-7037-3), May 2002, pp. 843-882.
  19. S. H.-L. Tu, “Power Amplifier Design for High Spectrum-Efficiency Wireless Communications”, Chapter 16 in Mobile and Wireless Communications: Network Layer and Circuit Level Design, Edited by S. A. Fares and F. Adachi, INTECH Education and Publishing (ISBN 978-953-307-042-1), Jan.2010, pp.321-353.
  20. S. H.-L. Tu, Analog Circuit Design for Communication SOC, Bentham Science Publishers (ISBN 978-1-60805-037-6), (Scopus), Jan. 2012. 

(B). Conference Paper and Technical Report:

  1. S. H.-L. Tu and C. Toumazou, “Highly efficient CMOS Class E power amplifier for wireless communications,” IEEE International Symposium on Circuits and Systems, Vol.3, California, pp.530-533, June 1998.
  2. S. H.-L. Tu and C. Toumazou, “Design of highly-efficient power-controllable CMOS Class E RF power amplifiers,” IEEE International Symposium on Circuits and Systems, Vol.2, Florida, pp.602-605, June 1999.
  3. S. H.-L. Tu and C. Toumazou, “Highly-symmetrical CMOS Class E RF power amplifier for low-distortion applications,” IEEE International Symposium on Integrated Circuits, Devices & Systems, Singapore, pp.271-274, Sep. 1999.
  4. Y.-H. Lin and S. H.-L. Tu, “Implementation of an Oversampling Data Recovery Receiver for Serial Link Communications,” International Symposium on Signal Processing and its Applications, Paris, France, pp.613-616, July 2003.
  5. S. H.-L. Tu, “A Power-Adaptive CMOS Class E RF Tuned Power Amplifier for Wireless Communications,” IEEE International SOC Conference, Portland, USA, pp.365-368, Sep. 2003.
  6. Y.-H. Lin and S. H.-L. Tu, “A Pipelined Serial Data Receiver with Oversampling Techniques for High-Speed Data Communications,” IEEE Conference on Electron Devices and Solid-State Circuits, Hong Kong, China, pp.167-170, Dec. 2003.
  7. S. Y.-S. Lin and S. H.-L. Tu, “A Novel Pulsewidth Control Loop for High-Speed Circuit Applications,” IEEE Northeast Workshop on Circuits and Systems (IEEE NEWCAS'04), Montreal, Canada, pp.221-224, June 2004.
  8. S. Y.-S. Lin and S. H.-L. Tu, “A New Pulsewidth Control Loop For High-Speed VLSI Systems,” IEEE International Midwest Symposium on Circuits and Systems (IEEE MWSCAS'04), Hiroshima, Japan, Vol.III, pp. 335-338, July 2004.
  9. [9] P. J. W. Huang and S. H. L. Tu, “A Digital PWM Regulator Based on Serial-Error Correcting Mechanism for DC-DC Buck Conversion”, IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC’05), Hong Kong, China, pp.289-292, Dec. 2005.
  10. [S. H.-L. Tu and C.-H. Yen, “Skew-Tolerant Domino Techniques for High-Speed Baugh-Wooley Multiplier Circuit Design”, IEEE International Midwest Symposium on Circuits and Systems, San Juan, Puerto Rico, USA, Vol.2, pp. 424-427, Aug. 2006.
  11. M. M.-H. Chiu and S. H.-L. Tu, "A Multi-phase DPWM Based on Fully Table Look-up for High-frequency Power Converters", IEEE International Midwest Symposium on Circuits and Systems, San Juan, Puerto Rico, USA, Vol.1, pp. 75-78, Aug. 2006.
  12. S. H.-L. Tu and C.-H. Yen, “A High-Speed Baugh-Wooley Multiplier Design Using Skew-Tolerant Domino Techniques,” IEEE Asia Pacific Conference on Circuits and Systems, Singapore, pp. 599-602, Dec. 2006.
  13. M. M.-H. Chiu and S. H.-L. Tu, “A Novel DPWM Based on Fully Table Look-up for High-frequency Power Conversion,” IEEE Asia Pacific Conference on Circuits and Systems, Singapore, pp. 679-682, Dec. 2006.
  14. S. H.-L. Tu and S. C.-H. Chen, “A 5.25-GHz CMOS Cascode Class-AB Power Amplifier for 802.11a WLAN,” IEEE International Conference on Microelectronics, Cairo, Egypt, pp. 23-26, Dec. 2007.
  15. S. H.-L. Tu and S. C.-H. Chen, “A 5.26-GHz CMOS Up-Conversion Mixer for IEEE 802.11a WLAN,” IEEE international Conference on Circuits and Systems for Communications, Shanghai, China, pp. 820-823, May 2008.
  16. S. H.-L. Tu and S.-Y. Lin, “A Novel Adaptive PWM Controller for DC-DC Buck Conversion,” IEEE international Conference on Circuits and Systems for Communications, Shanghai, China, pp. 326-329, May 2008.
  17. S. H.-L. Tu, S.-K. Chuang, and S.-F. Hsiao, “A Novel Digital PWM Controller with Dual-Regulating Mechanism for DC-DC Buck Conversion,” IEEE International Midwest Symposium on Circuits and Systems, Knoxville, USA, pp. 1-4, Aug. 2008.
  18. [18]   J. Yau and S. H.-L. Tu, “A High-Speed Frequency Acquisition PLL Using Phase Frequency Detector with Variable Gain,” IEEE International Midwest Symposium on Circuits and Systems, Seattle, Washington, USA, pp.101-104, Aug. 2010.
  19. S. H.-L. Tu and H.-H. Chen, “A Low Timing-Jitter Coupled Oscillator,” IEEE International Conference on Solid-State and Integrated-Circuit Technology, Shanghai, China, pp. 671-673, Nov. 2010.
  20. Y.-C. Chen and S. H.-L. Tu, “Low Jitter and High Precise Delay Generator with Coupled Ring Oscillators,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.65-69, May 2011.
  21. S. H.-L. Tu and C.-B. Chang, “A New Fully Differential Pulsewidth Control Loop,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.71-74, May 2011.
  22. C.-H. Lee and S. H.-L. Tu, “A Buck Conversion Controller Using Hybrid Error Process Unit,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.19-24, May 2011.
  23. Y.-S. Liu and S. H.-L. Tu, “A Double Conversion Tuner for Cable Modem Systems,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.23-27, May 2012.
  24. S. H.-L. Tu and H.-W. Yeh, “A PWM Controller with Table Look-up for DC-DC Class E Buck/Boost Conversion,” IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong, China, June 2013.
  25. F.-L. Chiu and S. H.-L. Tu, “A Fast Frequency Acquisition Phase-Locked Loop Using Phase Compensation Techniques,” IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong, China, June 2013.
  26. S. H.-L. Tu, C.-K. Weng, and P.-C. Tseng, “A Two-Stage Class E High-Voltage Ultrasound Pulser for Medical Imaging Applications,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.33-36, May 2014.
  27. S. H.-L. Tu and C.-H. Chen “Characteristic Analysis of Fractional-Order Wien-Bridge Oscillators,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.57-60, May 2014.
  28. S. H.-L. Tu and B. Lin “40V/2.5A CC/CV Mode Synchronous Step-down Regulator,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.61-64, May 2014.
  29. S. H.-L. Tu, K.-H. Yang, “Improvement for Line Regulation of Primary-Side Controlled Flyback LED Drivers,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.65-70, May 2014.
  30. S. H.-L. Tu and Y.-T. Li “Design of Fractional-Order Active Inductors,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.71-74, May 2014.
  31. S. H.-L. Tu and C. Weng, “A 4-level RF Frequency-Shift Keying Demodulator for Biomedical Implants,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.75-78, May 2014.
  32. C.-K. Liao and S. H.-L. Tu, “Switched Capacitor Boost-Buck Voltage Regulators,” EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.5-10, May 2015.
  33. S. H.-L. Tu and Po-Yu Tsai, “Self-biased cascode Class E high-voltage ultrasound pulse generation for medical imaging applications”, EE FJU Workshop on Research and Development, Taipei, Taiwan, pp.47-51, May 2016.
  34. C. Paparassiliou, C. Toumazou, S. Tu, K. Fobelets, J. Hampson, W. Jeamsaksiri, S. Despotopoulos, ”A report on SiGe FET circuit design”, Defence Science and Technology Lab., Ministry of Defence, UK, Jan. 1999. 
(C). Consulting Technical Report:
  1. S. H.-L. Tu, “A report on USB2.0 circuit design,” ACARD Technology Corp. Taipei, May 2005.

Academic Service:

  1. Session Chair of the “The 6th International Symposium on Next-Generation Electronics (ISNE)”, Keelung, Taiwan, 2017.
  2. Session Chair of the “International Conference on Electronics, Circuits and Systems (ICECS)”, Venice, Italy, 2012.
  3. Examiner of “Electronic Instrumentation” for General Examination of Examination Yuan (Taiwan), 2017
  4. Examiner of “Electronic Instrumentation” for Special Examination of Examination Yuan (Taiwan), 2016
  5. Examiner of “Electronics” for Senior Examination of Examination Yuan (Taiwan), 2014
  6. Examiner of “Electronic Instrumentation” for Special Examination of Examination Yuan (Taiwan), 2012
  7. Reviewer of the “World University Rankings” (Academic Reputation) for Times Higher Education (UK) 2012
  8. Reviewer of the “World University Rankings” (Academic Reputation) for Times Higher Education (UK) 2011
  9. Reviewer of the chip tape-out for Chip Implementation Center (CIC) (Taiwan), 2008-2016.
  10. Editor-in-Chief of technical textbook, Analog Circuit Design for Communication SOC, Bentham Science Publishers (ISBN 978-1-60805-037-6), (SCOPUS), Jan. 2012.
  11. Lecturer of the course, “Integrated Circuit Design,” for Hanker Hi-Tech Academy (Shanghai) Ltd., China, 2008
  12. Lecturer of the course, “Electronics,” for ACARD Technology Corp., New Taipei City, Taiwan, 2005
  13. Lecturer of the course, “Application-Specific Integrated Circuit Design,” for ACARD Technology Corp., New Taipei City, Taiwan, 2005
  14. Lecturer of the course, “VLSI Digital Signal Processing Architecture Design,” for ACARD Technology Corp., New Taipei City, Taiwan, 2005
  15. Lecturer of the course, “Communications Integrated Circuit Design,” for ACARD Technology Corp., New Taipei City, Taiwan, 2005
  16. Lecturer of the course, “RF Integrated Circuit Design,” for Tze-Chiang Foundation of Industry and Science, Taipei, Taiwan, 2002-2003
Awards:
  • Research achievement awards of the Research and Development Division, Fu Jen Catholic University, 2014
  • Research achievement awards of the Research and Development Division, Fu Jen Catholic University, 2012
  • Senior teacher award of the Ministry of Education, Taiwan, 2011
  • Outstanding teacher award of Fu Jen Catholic University, 2011
  • Research achievement awards of the Research and Development Division, Fu Jen Catholic University, 2008
  • Research achievement awards of the College of Science and Engineering, Fu Jen Catholic University, 2007
  • Research achievement awards of the Research and Development Division, Fu Jen Catholic University, 2006
  • Research achievement awards of the College of Science and Engineering, Fu Jen Catholic University, 2005
  • British overseas research student awards (ORS) 1997/1998 and 1998/1999.    






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